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Intel/MaxLinear Chip 'Compatible' With DOCSIS 3.1 Nets

There are no qualified or certified DOCSIS 3.1 products to speak of yet, but some suppliers are already starting to talk up components that provide “network compatibility” with the emerging multi-gigabit cable IP platform.

Intel and MaxLinear announced Friday that they have co-developed a next-gen cable modem/gateway chipset designed to work on DOCSIS 3.1-powered networks while also baking in a DOCSIS 3.0 implementation that can bond up 32 downstream channels – a requirement for D3.1 modems, they said.

The first wave of DOCSIS 3.1 modems will be hybrids that can support both DOCSIS 3 .1 and DOCSIS 3.0 spectrum, a setup that should help to smooth cable’s migration path to D3.1, a platform that will be capable of delivering 10 Gbps in the downstream, and at least 1 Gbps in the upstream.

The DOCSIS 3.0 bonding configuration in the new 32-channel Intel/MaxLinear product will support downstream bursts of 1.2 Gigabits per second in North American settings (6MHz-wide channels), and up to 1.6 GHz on EuroDOCSIS systems that use 8MHz-wide channels.

Intel and MaxLinear didn’t say when the new chip will be ready for commercial shipments (Multichannel  News will update the story when those facts are known), but they did note that the new 32-channel system is made to deliver 33% percent more downstream punch in the same power envelope.

Update: Intel confirmed that the new chipset is currently sampling to customers, with volume shipping slated for the fourth quarter of 2014. The chip is also paired with the ability to bond up to 8 upstream channels.

The chipset, to be demonstrated at the IBC show in Amsterdam, combines an upgraded form of Intel’s Puma 6 DOCSIS silicon with MaxLinear’s MxL268 Full-Spectrum Capture tuner, which can obtain channels for bonding from anywhere along the cable spectrum. They said the chip provides a “pin-compatible upgrade path” from 16 to 24 to 32 channels.

“By listening to our customers, we have been able to satisfy the market need and quickly bring a 32-channel solution to complement our Puma 6 family to market,” said Ran Senderovitz, vice president and general manager of Intel’s Service Provider Division, in a statement.

Instead of using 6 MHz- or 8MHz-wide channels, the DOCSIS 3.1-facing side of coming hybrid D3.0/D3.1 modems will utilize orthogonal frequency-division multiplexing (OFDM), a technique already popular in the wireless realm that will enable operators to pack tiny subcarriers into wide blocks of bandwidth and utilize higher levels of modulation that can deliver more bits per hertz. When paired with a low density parity-check (LDPC), a Forward Error Correction (FEC) format that uses less bandwidth than the current Reed-Solomon approach, DOCSIS 3.1 is expected to be about 50% more bandwidth-efficient than DOCSIS 3.0.

CableLabs issued the first product specs for DOCSIS 3.1 last fall; deployments are expected to be well underway by 2016.

Last June, Broadcom announced a DOCSIS 3.0 chip that can bond 32 downstream channel and 8 upstream channels, but has yet revealed its DOCSIS 3.1 product roadmap. STMicroelectronics, another chipmaker, is also expected to toss its hat into the D3.1 ring.