Full Duplex DOCSIS Plows Ahead

Moving HFC networks a step closer to supporting multi-gigabit symmetrical speeds, CableLabs said Wednesday it has released the physical layer specifications for Full Duplex (FDX) DOCSIS.

Read More: Complete coverage of Cable-Tec Expo 2017

FDX, an annex to DOCSIS 3.1, will put cable operators in position to deliver multi-gigabit symmetrical speeds – up to 10 Gbps -- by allowing both upstream and downstream traffic to run on the same swath of spectrum. By comparison, DOCSIS 3.1 was initially designed to support up to 10 Gbps down in the neighborhood of Gbps-plus upstream.

RELATED: Cisco Demos Full Duplex DOCSIS

The PHY layer specs arrive a little over a year after CableLabs started the specification writing process. CableLabs introduced the concept in February 2016.

RELATED: CableLabs: ‘Full Duplex’ Reaches Specification-Writing Phase

The release of the PHY layer specs signals that FDX has reached the “advanced maturity stage,” enabling vendors to push ahead with their product development, Belal Hamzeh, CableLabs’s vice president, wireless technologies, said.

Hamzeh said the MAC layer specs for FDX are in the working-group stages, but couldn’t say when they would be completed other than to expect that to occur “in the near future.”

He also stressed that FDX is 100% compatible with DOCSIS 3.1. Per the specs, the FDX band will reside between 108 MHz and 684 MHz (regardless of whether FDX channels occupy the whole band), so it’s possible for existing D3.1 modems to also use some spectrum set aside for D3.1. By comparison, D3.0 modems, which relies on channel bonding, can’t use D3.1 spectrum, which taps into blocks of tiny OFDM (Orthogonal Frequency Division Multiplexing) subcarriers. However, first batch of DOCSIS 3.1 modems are hybrids in the sense that they can deliver traffic in spectrum set aside for D3.0 and D3.1.

Per the FDX DOCSIS frequency plan, the ceiling is 684 MHz and derived from starting with the lower band edge of a “mid-split” (which raises the legacy spectrum ceiling to 108 MHz), allowing for three OFDM channels at 192 MHz each.

Demos of FDX-facing technologies and products are expected to be on show at next week’s SCTE•ISBE Cable-Tec Expo in Denver.

Read more: Complete coverage of Cable-Tec Expo 2017

Hamzeh added that CableLabs is already working on process to conduct interoperability testing for FDX.

Operators looking to deploy FDX DOCSIS will need to move to a node+0/fiber deep architecture, whereby there are no amplifiers between the node and the premises. Per the specs, a distributed architecture is also assumed due to the echo cancellation functionality that FDX requires. FDX-complaint nodes will be made to support simultaneous upstream and downstream communications over each FDX channel, enabled by cancelation techniques for self-interference and echo cancellation.

Enabling FDX DOCSIS will help cable operators deliver on HFC the kind of symmetrical speeds that are delivered by fiber-to-the-home architectures and, early on, will likely be used for commercial-grade services.

Some industry experts see FDX trials getting underway sometime next year and into 2019, with 2020 seen as the technology’s first significant deployment year. Much more on FDX product development, use cases, and deployment expectations will be covered in Multichannel News feature story to appear next week during Cable-Tec Expo.

For more color on how some top cable operators see FDX DOCSIS factoring into their plans, please see this Q&A (subscription required) with execs from Charter Communications, Comcast, Cox Communications, Liberty Global, and Mediacom Communications.

The CableLabs FDX DOCSIS PHY layer specs lists contributors from a mix of service providers and vendors, including Adtran, Altera, Analog Devices, Arris, Broadcom, CableLabs, Capacicom, Casa Systems, Charter, Cisco Systems, Cohere, Comcast, Cox Communications, Emcore, Harmonic, Huawei, Intel, Maxim, MaxLinear, Nokia, Qualcomm, Rogers Communications, SCTE, SED Systems, Sony, STMicro, Teleste, TI, Time Warner Cable (now part of Charter), Vecima Systems, and Xilinx.